The use of graphene in ultra-high frequency electronics is limited by the fabrication processes: Defects result in mobility degradation and top-gated graphene transistors have large resistance due to non-optimum alignment of the electrodes.

Xiangfeng Duan and co-workers, University of California, Los Angeles, USA, have used a self-alignment approach to synthesize graphene transistors with an aligned nanowire top-gate.

Co₂Si–Al₂O₃ core–shell nanowires were aligned on top of graphene flakes on a silicon substrate. A thin layer of platinum was deposited on top of the graphene and across the Co₂Si–Al₂O₃ core–shell nanowire, to form the self-aligned source and drain electrodes next to the nanowire gate.

Transistors with channel lengths as low as 140 nm could be formed in this way and these were shown to have high transconductance and high cut-off frequencies.

• High-speed graphene transistors with a self-aligned nanowire gate
  L. Liao, Y.-C. Lin, M. Bao, R. Cheng, J. Bai, Y. Liu, Y. Qu, K. L. Wang, Y. Huang, X. Duan,
  Nature 2010, 467, 305–308.
  DOI: 10.1038/nature09405